| Item type |
紀要論文 / Departmental Bulletin Paper(1) |
| 公開日 |
2023-03-30 |
| タイトル |
|
|
タイトル |
広島工業大学におけるVLSI設計・プロセス工学教育 |
| タイトル |
|
|
タイトル |
On an education of VLSI design and process engineering In Hiroshima Institute ofTechnology |
|
言語 |
en |
| 言語 |
|
|
言語 |
jpn |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
VLSI design |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
semiconductor process engineering |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
CAD |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
PLD |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
FPGA |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
VHDL |
| 資源タイプ |
|
|
資源タイプ識別子 |
http://purl.org/coar/resource_type/c_6501 |
|
資源タイプ |
departmental bulletin paper |
| 著者 |
田中, 武
大村, 道郎
Tanaka, Takeshi
Ohmura, Michiroh
|
| 抄録 |
|
|
内容記述タイプ |
Abstract |
|
内容記述 |
The departments of Electronic and Electrical Engineering of Hiroshima Institute of Technology have been teaching integrated circuit designs and processes of semiconductors since 1989. In Electronic Experiments III, students learn the primitive logic circuits such as NOT, AND, etc. and their combination circuits that are expressed by schematic logic design using Graphic Editor, one of MAX-Plus II applications. Designed circuits are programmed for the FPGA device and their operation of the designed circuits is confirmed by using push switches and LED. Almost all the students find it best to study the logic circuits using computers compared with the handwriting of logic circuits. In Electrical Experiments II, the logic circuits are designed to display each student number in seven segments LED and written in VHDL language, based on the counter circuits and the decoder circuits. Next, the logic synthesis and the simulation are conducted. Designed circuits as well as Electronic Experiments III are confirmed . |
| 書誌情報 |
広島工業大学研究紀要
巻 34,
p. 7-13,
発行日 2000
|
| 出版者 |
|
|
出版者 |
広島工業大学 |
| ISSN |
|
|
収録物識別子タイプ |
ISSN |
|
収録物識別子 |
03851672 |
| 書誌レコードID |
|
|
収録物識別子タイプ |
NCID |
|
収録物識別子 |
AN0021271X |
| フォーマット |
|
|
内容記述タイプ |
Other |
|
内容記述 |
application/pdf |
| 著者版フラグ |
|
|
出版タイプ |
VoR |
|
出版タイプResource |
http://purl.org/coar/version/c_970fb48d4fbd8a85 |
| 日本十進分類法 |
|
|
主題Scheme |
NDC |
|
主題 |
549.7 |
kenkyukiyo34007.pdf (2.2 MB)
